A published compensator design rule, twenty years old and widely taught, reproduced from its own figures and found to be incomplete for the multiphase case it is used in. The gap was derived before the source text was read, then confirmed at two, four and eight phases against one simulated and one measured arbiter, with the alternative explanation stated in advance, tested, and refuted. The loss model for the next design step was then predicted, measured, and measured again after its own measuring script was found to be wrong.
Every prediction on this page was committed to a file before the run that tests it. That is what makes a failed prediction reportable, and there are failed predictions below.
A 2004 doctoral dissertation on multiphase voltage-regulator control. Public, citable, and still in use. A commercial circuit simulator, stock install. One engineer. No client material of any kind is involved in this case.
Everything here is reproducible by you. The source states its component values, its switching frequencies, its target bandwidth and its output-impedance rule, and it prints a measured loop-gain plot with a marker on it. That is why this design was chosen over a current one. A modern application note gives you a topology and no arbiter, and grading your own homework is not evidence.
Read the tags.
MEASURED DOCUMENTED DERIVED NOT EVALUABLE
A check that cannot decide returns NOT EVALUABLE. It is never promoted to a pass because the answer looks plausible.
The published rule sets the compensator's DC gain from the current-sense gain and the output capacitor. Built exactly as printed, on the author's own two-phase ceramic design, it lands at 2.18 times its own stated bandwidth and half its own stated output impedance.
Divided by the phase count, the same design lands on both.
| phases | measured ratio | against | error | tag |
|---|---|---|---|---|
| 2 | 1.99036 and 1.99173 | 2 | -0.48 % and -0.41 % | MEASURED |
| 4 | 3.97734 | 4 | -0.57 % | MEASURED |
| 8 | 7.95063 | 8 | -0.62 % | MEASURED |
Monotonic, every error negative, the magnitude growing slowly. And the crossover, independently:
| as printed | corrected | tag | |
|---|---|---|---|
| crossover against the stated 130 kHz, two phases | 2.18x | +2.76 % | MEASURED |
| output impedance by the published rule at the hardware's own measured 220 kHz, four phases | n/a | -0.25 % | MEASURED |
| crossover against that measured marker, four phases | n/a | +0.08 % best, +3.01 % worst | MEASURED |
| crossover against that same marker, eight phases | n/a | +0.378 % | MEASURED |
The four-phase board's switching frequency is not stated in the source, so it was swept. Three decks sat inside the model's own guard, a crossover below a fifth of the switching frequency, declared before the runs. The best of them lands at +0.08 % and the worst at +3.01 %.
Two phases was never going to be enough, and neither was four. A factor of two is the least diagnostic number in engineering. It is equally consistent with a transcription slip, a peak-versus-average confusion, or a single-ended versus differential sense, and none of those has anything to do with phase count. Four separates those. Four does not separate "the divisor is the phase count" from "the divisor saturates at four".
So that alternative was written down as the interesting outcome, before the deck existed, in the file that specifies the experiment. The file calls a result near 4 "the interesting one" and says it would narrow the published claim to "up to four phases", with every sentence of the finding rewritten.
It came back 7.95063. The alternative is refuted.
MEASURED A sharper companion prediction said the negative bias was systematic and would put the eight-phase result between 7.93 and 7.95. It measured 7.95063, six ten-thousandths outside the band. FAIL Recorded as FAIL and left as written. It identified a real effect and missed its size. That is a different result from being wrong, and collapsing the two loses the distinction.
MEASURED A closed-form model built from the author's own two equations reproduces the measured loop's magnitude to 0.03 dB from fs/20 to fs/5. With one term added, the output resistance that follows from the modulator's own definition, a single transport delay leaves a phase residual of 0.400 degrees RMS from 10 to 200 kHz. Above fs/4.1 it stops being a model of that loop, and the file states that limit beside the model so it is never quoted outside its range.
The corrected loop is the first half of the case. The second half is a power stage upgraded from 2004 devices to 2023 devices, and that needs a loss model: how conduction, gate charge, body-diode conduction during dead time and winding resistance divide the budget. The model was checked against the simulator, and then the check was checked.
MEASURED An open-loop power stage at 1.5 V and 25 A, 300 kHz, with two device generations, 2004 and 2023, at three dead times, 20, 50 and 100 ns. The predictions were committed before the deck was built. At the 2004-device, 50 ns corner:
| predicted | measured | error | |
|---|---|---|---|
| output voltage | 1.500 ± 0.005 V | 1.500096 V | +0.096 mV |
| output current | 25.00 ± 0.1 A | 25.0016 A | +1.6 mA |
| total simulated loss | 3.0611 W | 3.0523 W | -0.29 % |
| efficiency, simulated terms | 92.45 % | 92.47 % | +0.02 pt |
The output voltage is the sharp check. The on-time was solved from the loss model, so the output voltage tests both conduction terms, the body-diode forward drop, the dead-time placement and the winding resistance at once. All six corners land within 0.114 mV of 1.500000 V on one duty equation, and within 0.129 mV of each other.
MEASURED Dead time costs the same on modern silicon. Each 80 ns of dead time costs 2.24 efficiency points on the 2004 devices and 2.36 points on the 2023 devices. The body-diode drop is 0.8 V on both. The body diode's share of the loss budget:
| dead time | 2004 devices | 2023 devices |
|---|---|---|
| 20 ns | 9.4 % | 14.4 % |
| 50 ns | 21.9 % | 31.2 % |
| 100 ns | 35.9 % | 47.6 % |
At 100 ns on the modern devices the body diode is nearly half the entire budget. Upgrade the silicon and leave the dead time alone, and the loss moves toward the one term nobody touched.
NOT EVALUABLE These are the losses the simulator represents. Output-capacitance charge, switching overlap and reverse recovery are absent from the model and the deck by construction, so these efficiencies are not comparable with the 86.71 % this case derived for the source's board at 300 kHz by extrapolating from its 500 kHz and 1 MHz figures. Continuous conduction only, 4.4 A to 25 A.
The build record said conduction loss agreed with the analytic budget to 0.018 %. On 2026-09-18 the script that reads losses from the simulator's waveforms was found to place the inductor current one sample ahead of its own time, and on 2026-09-19 it was fixed. Squared over the wrong sample's interval, the early current reads the top switch high and the bottom switch low. It was found because a second, independently written reader disagreed with it by 0.004 W on the top switch at a 1 MHz deck. With the fix, every corner was read again:
| term | analytic | old reading | error | corrected | error |
|---|---|---|---|---|---|
| top switch | 0.4447 W | 0.4500 W | +1.20 % | 0.44538 W | +0.153 % |
| bottom switch | 1.3209 W | 1.3159 W | -0.38 % | 1.31898 W | -0.145 % |
| conduction, sum | 1.7656 W | 1.7659 W | +0.018 % | 1.76436 W | -0.070 % |
DOCUMENTED for the old errors, DERIVED for the corrected ones, each good to about 0.01 %.
The 0.018 % was two errors cancelling. Corrected, the top switch agrees about eight times better and the bottom more than twice as well, and the sum agrees worse, because the two errors no longer cancel. The per-term figures are the result. The 0.018 % sentence is withdrawn.
The next design step is planned at 1 MHz, outside the 300 kHz range the model was fitted in, so every 1 MHz prediction is an extrapolation and is tagged DERIVED. Two hypotheses were registered for short dead times. One said conduction loss rises as dead time falls. The other, a relation between the diode's conduction window and the effective duty, predicted a lower value, with a tolerance band. Two 1 MHz decks were pre-registered against them, each before it existed.
At the first, with 29.1 ns of dead time, the measurement fell 0.0303 W below the value the first hypothesis held and within 0.0004 W of the relation. A second, independently written reader put it 0.033 W below the first hypothesis, so that verdict does not depend on the reader. MEASURED
The second, with 6.0 ns of dead time, was read three times, and the first two readings were withdrawn.
| reading | measured, with | band, built with | verdict it selected |
|---|---|---|---|
| first | 1.33262 W, the early reader | the early reader | 0.00021 W above the band: the first hypothesis stands on top of the relation |
| second | 1.32984 W, the corrected reader | the early reader | 0.00179 W below the band: neither stands |
| third | 1.32984 W, the corrected reader | the corrected reader | inside the band, 1.33009 ± 0.00124 W |
The first two each had the early reader on at least one side of the comparison, and the defect at this deck was about 3.6 times the width of the band being tested. The third reads both sides with one instrument. The relation stands at this deck, and the first hypothesis is refuted there. At the first deck the same relation, re-derived the same way, lands 0.00034 W from the measurement. DERIVED
The band in the third reading was re-derived after the measurement was known, from the six corners read again with the corrected script, so it is tagged DERIVED. The relation itself was registered before either deck existed.
Since 2026-09-18 the case has run on a loop on the engineer's own workstation: Windows Task Scheduler tasks running plain PowerShell scripts, a queue of job files, and Claude Code, Anthropic's command-line agent, running the Claude Opus 5 model for the jobs that read, derive and write. Every job ends in a receipt with its verdict, its inputs by hash and its outputs by hash. A pre-registration is hashed before the deck it judges exists. The simulator is started and driven by a script through the operating system's UI Automation interface. A governor job applies the engineer's current plan and stops when the next step needs his ruling.
MEASURED On 2026-09-21 the loop rebuilt one of Stage 2's corners from its script under a new name, ran it and read it: pre-registration at 13:30, simulation at 13:40, reading finished at 13:56. The new output file is 24,003,206 bytes and identical, byte for byte, to the one the same corner produced on 2026-09-11. The reading script printed the recorded values 21 of 21 and both readings 10 of 10.
The run shows that the route from a queued job to a measured number works with no one operating the machine, and that the simulator reproduced its own output exactly across ten days and a rebuilt deck. The rulings that shaped this case, including which reading of the second 1 MHz deck stands, were made by the engineer, and the loop carried them out. A session that runs unattended is evidence about throughput, and this page claims nothing more from it.
MEASURED On 2026-09-22 a revised version of the script that generates the multiphase decks was run on the workstation against the version it replaces. The outputs matched byte for byte, 59 files of 59 across the test matrix and 8 of 8 at eight phases, and a control set with one file altered was flagged at that file and line, which shows the comparison could fail.
MEASURED On 2026-09-26 the loop ran eleven datasheet checks on candidate parts for the next design step, nine at once and then two more; ten read the maker's own pages as images, and the eleventh could not reach its maker's site and recorded that it had read nothing. DOCUMENTED The first page of the sheet for the recommended low-side switch, which the engineer had picked that morning, states that the part is not designed for switching applications. The recommendation had been built from automatically fetched text, which did not carry that line, and the part was taken out of the design.
DOCUMENTED Running real work two simulations at a time, each in its own instance of the simulator, is allowed only after a control with known answers reads as predicted and the engineer rules to release it.
MEASURED The first control, on 2026-09-23, launched two instances within a millisecond of each other. One came up with the full product name in its window title, waited the three minutes allowed for its partner, ran its deck alone and reproduced the known answer byte for byte. The other's title still had no product name after the eight seconds it was given to settle, and it offered no line to type a command into, so the run closed it without sending its deck. DOCUMENTED The record keeps two explanations open, a start slower than the settling time and a licence race between two launches in the same second, and the second control could not separate them because it launched the instances apart.
MEASURED That second control, on 2026-09-25, put a lock around each launch, so the second instance started only after the first showed its product name. The two titles reached the product name 2.0 s and 1.0 s after their first windows. Both decks ran, and their solves overlapped. The solves took 3.583 s and 3.338 s, against 3.085 s for one of the decks solving alone on 2026-09-23. Fifteen of the seventeen predictions held. The two that failed are the two that carry the known answers: each run exported the other deck's known answer, byte for byte, and the printed means came back swapped. The reading job recorded NOT_AS_PREDICTED under the pre-registration's catch-all reading, and the loop went back to one simulation at a time that day, as the pre-registration requires.
MEASURED On 2026-09-26 a job looked for what the two instances shared and found one results folder, fixed by the working directory with nothing in its name per instance, and one result name. It ruled out the temporary data folder, which each instance already had to itself. DERIVED The working file each solver wrote for its own deck carries that deck's sign, so the answers crossed on their way back from the solver, before the export. NOT EVALUABLE What carried them across is not yet known.
MEASURED The same day the launch script gave each instance its own results folder and its own temporary folders, and a third control ran. One instance sat on its start-up screen for the full minute it was allowed and was closed without running. The other ran its deck alone, and its export matched its own known answer byte for byte, with every results file written into its own folder. DOCUMENTED A job that read the solver's binaries found that the named channels it creates carry the solver's own process number. DERIVED Two solvers therefore cannot share one.
MEASURED A fourth control that afternoon gave each instance three minutes to start. Both started within two seconds and both decks were sent together. One instance then reported that the result it loaded held no data, and the other had not finished its run three minutes later. DOCUMENTED On 2026-09-27 the engineer ruled that the loop runs one simulation at a time, and parked the question.
MEASURED Two records, reported side by side and never added. They have different numbering, different scope and different escape tests, and adding them is precisely the mistake that put a wrong figure on an earlier draft of this page.
the build's defect table, sessions 3 to 8 67 defects, 15 escaped of which described in the log 61 lost, six contiguous rows, on no surviving record, one an escape the numbered-defect record, 61 to 97 37 defects, 6 escaped
Escapes, under three definitions, because "escaped" means three things:
reached the engineer as a claim he was asked to act on 14 plus written into a committed artefact he had access to 18 plus caught internally before either 20
The middle figure is the one a reader means: it left the working copy. The other two bound it in both directions, which is more informative than any single number and costs one line.
How this figure came to be publishable at all is the part worth reading. An earlier version of this page carried 7 of 64. That was wrong. The correction offered in its place, 19 of 80, was worse, because it merged two records that are separate by design. The page then published no total at all for a day while the ledger was audited, and the audit found the discrepancy came from two records of different scope being added together, with no arithmetic error anywhere.
Reconciling it turned up something better than a number: the build log is complete everywhere except one contiguous block of six rows in one session, identified, bounded, and absent from every surviving record. Everything else reconciles exactly where a total exists to check against.
DOCUMENTED The numbered record did not stop at 97. Later work, from the coupling experiments to Stage 2 and the loop, added defects in its own result documents, and the numbers now run past 170. Those documents have not yet been reconciled into one table the way 61 to 97 were, so this page publishes no total and no escape count for them. A total published before its reconciliation is the mistake described above.
Every defect is logged with the mechanism that caught it. Escapes are recorded per session. No ratio has been revised after the fact.
By an operating discipline that the tooling made cheap enough to run every time.
Supporting this: schematics generated from scripts, so topology is right by construction; a netlist check that reads what the solver receives, which can differ from what was intended; a state walk over the switching period run before any simulation; and a design-sheet gate that refuses to emit a deck whose numbers disagree with the sheet that specified it.
Two pre-flights, quoted because they are the shape of the whole approach: 11,571 pin pairs agree, 0 disagree at four phases; 30,739 agree, 0 disagree at eight, each against an independently written netlist. MEASURED
This list is where the page earns its credibility, and it is longer than the findings list on purpose. Each entry names what caught it.
A claim made to the engineer that was simply false. He was told the simulator was unavailable and two queued items were blocked, on the strength of a failure in a subsystem the simulator does not use. The project's own reference file already said that subsystem fails intermittently and said not to treat it as a blocker. It was hit, and reported as a blocker anyway. He caught it in one short sentence. The rule this produced: a capability is not unavailable until the mechanism it uses has been tried and failed.
A deck that was valid and was the wrong circuit. Two functions bound a phase count as a default argument, frozen at import, while a third read it at call time. An eight-phase request would have produced a four-phase deck that pre-flighted clean, ran, and got measured as eight: internally consistent, perfectly valid, and wrong. No checker that inspects one artefact can see that. It was caught by a check that compares two independently built descriptions, which named all 96 missing pins.
The same error three times in one script, in a single day. A derivation printed a table without checking it and published negative inductances as data. Fixing it produced a bound, which was then not applied to the table one section below, where every coupled row was outside it. The fix for that ends with the sentence "conflating the two would have been a third instance of the same error in one script." The third instance was committed two sections later. Naming a failure mode in writing does not stop you committing it.
A prediction that was pre-registered, fired as designed, and still tested the wrong statistic. It would have buried a refutation the data supports at 3.45 standard errors.
A loop gain read upside down. The export does not preserve the column order it was asked for. It was caught by an extractor that refuses anything but exactly one falling crossing. Nobody had noticed it. The same export did it again the same day on the eight-phase deck, and the fix held.
A verification gate that returned CLEAN on a file it never opened. Its file walk did not include the format the artefact was in.
A gate whose rulings depended on which directory you ran it from. A properly reviewed file reported as an unreviewed hit from anywhere else, which trains a reader to dismiss hits, the exact damage the gate exists to prevent.
A published figure that was wrong, and a correction that was worse. The ledger above tells it in full.
A question put to the engineer with the wrong evidence attached. The item was named correctly and the evidence shown belonged to a different item. He was told, because a person who rules on evidence is entitled to know when the evidence he was shown was not the evidence for the thing he ruled on, whether or not it changed his answer.
A headline agreement that was two errors cancelling. Conduction loss "agreed to 0.018 %" because the top switch read 1.20 % high and the bottom 0.38 % low. The build record's own text had warned about exactly this kind of agreement a paragraph earlier.
A measuring script one sample early, which moved a pre-registered verdict twice. The error was about 3.6 times the width of the band it was judged against. It was found by writing the reader a second time, independently, and looking at why the two disagreed.
A deck with no body diode on its high side, left out on purpose with the reason written down. The reason was that positive inductor current keeps that diode reverse-biased. It held in the steady-state window every corner was read in, and nowhere else. With both switches off and the inductor current negative, at start-up, light load or discontinuous conduction, the switch node had only the switch's 1 MOhm off-resistance to push against, which is the 30 kV spike at the start of one trace. The steady-state readings at 25 A are unchanged by construction, so the figures above stand. The fix is a mirrored diode per phase, and the switching-state check now walks it.
A step reported as cancelled that had run. The interface showed a delivery step as cancelled; on the machine it had run in full and installed a file. The next delivery's name check found that file already in place and stopped before anything was sent twice. An interrupted step is now treated as unknown until its possible outputs have been inspected.
An isolation check that held while the answers crossed. The control of 2026-09-25, which ran two simulations at once, predicted isolation on each instance's temporary folder and on the user's settings file, and that prediction held. The two instances also wrote into one results folder and used one result name, which the prediction did not cover. Every other prediction held too, and only the two that carry the known answers failed: each run came back with the other deck's known answer. What carried the answers across is not yet known.
A part recommended from a summary of its datasheet. The comparison that recommended the low-side switch took its figures from text an automated fetch extracted and summarised, and it cited the sheet's first page. That page says the part is not designed for switching applications, and the summary carried no such line. The engineer picked the part on the recommendation. Reading the same page as an image surfaced the statement that morning, and the part was taken out of the design.
A result that waited two days to be read. The first control for two simulations at once read NOT_AS_PREDICTED at 11:33 on 2026-09-23. The governor job after it recorded that a ruling was owed and wrote no job, since no rule of its plan covered the control. The result was not read or put to the engineer until 10:48 on 2026-09-25, and the loop ran nothing in between.
Statements made before the file that decides them was read, four in one day and a fifth the next morning. On 2026-09-26 the engineer was told an installer command was ready without a re-check against the workstation, that a driver's maker model would bring its own dead time into the simulator when no route for such a model exists, and that a check would confirm an uninstalled model left nothing behind, when the simulator's own script describes a catalogue holding every user model that ever existed. A brief written that day for a subagent carried three facts the record does not hold. Each was corrected, and the one acted on, the installer, refused and changed nothing. The rule taken: a decision put to him separates what has been read, with its file, from what is expected and from what is not known, and the message is searched for outcome words before it is sent. The next morning the message that reported the rule told him the leftover catalogue entry could be removed afterwards, and nobody had read how. The search missed it, because the sentence used none of the listed words.
A claim carried on this page after the case had measured it false. The case measured the magnetics section's second claim false on 2026-09-12. The draft of 2026-09-21 still carried it, because that section was copied forward and only its figures were re-read against their sources, and the claim had no figure in it. It was found when the page was traced against its sources again before launch.
This guideline had twenty years of scrutiny. Yours has had two.
The finding concerns per-phase sensed current into a shared output capacitor, the control structure that a discrete multiphase buck, an inverse-coupled build and a trans-inductor voltage regulator all share unchanged. Magnetics do not enter it. The topology moved, and the loop architecture stayed where it was.
So the obvious question was put to the work: does the correction survive coupling?
MEASURED It does. The author's two-phase ceramic design was built again with its two inductors inversely coupled at α = -0.5, and the corrected and as-printed decks were compared within each condition. Their output-impedance ratio measured 1.95465 coupled against 1.97642 uncoupled, 1.10 % apart. Had coupling collapsed the divisor, the ratio would have fallen to 1.00, a factor of two away, and that outcome was written down before the decks were built. Read a second way, as the droop after a load step, which a voltmeter can check, the ratio measured 1.99024 coupled against 1.99174 uncoupled, 0.075 % apart. Coupling redistributes di/dt between phases and leaves the count of phases delivering into the bank alone, and a mutual inductance passes no DC. The divisor is the number of phases feeding the capacitor bank, however they are wound.
The section's second claim was measured false. Earlier drafts of this page said, tagged DERIVED, that what coupling moves is each phase's finite output resistance, in step with the differential inductance. At α = -0.5 that inductance is 1.5 times the uncoupled one, so the resistance should have risen 1.5 times and the loop gain with it. MEASURED At two loads and two compensator settings, coupling lowered the DC loop gain, by 0.22 to 0.55 dB in four pairs of decks out of four, and the drop grew with the load by 1.735 and 1.769 against the 1.668 registered for a change at the output node. DERIVED Read through the plant model, the output resistance moved by a factor of 0.824, softer where the claim said stiffer, with a 6.6 % spread across four extractions, and neither eigenvalue of the coupled inductance accounts for it. At α = -0.5 on a two-phase cell, inverse coupling lowers the DC loop gain slightly and leaves the closed-loop droop unchanged to better than 0.1 %. Its case rests on ripple and transient behaviour.
And checking that algebra turned up a bound nobody had written down. For a symmetric coupled group to describe a physical magnetic circuit, the coupling coefficient is limited by the group size: at four coupled phases it cannot go below -0.333, at eight below -0.143. Vendor application notes report coupled groups of two and three, an interleaving rule that divides by the group size, and ripple that rose when a third phase joined. They report the practice, and the bound explains it.
NOT EVALUABLE The trans-inductor case stays open, now for a stated reason. Its series secondary adds a component common to every sensed current, where coupling redistributes among them, and that path's gain has not been derived.
The session that produced the coupling measurement was recorded, and the cut of it is on the Evidence page. It ends on that number.
None of this is specific to one simulator or one converter.
The discipline is the portable asset. The tooling makes it affordable to run, and the engineer still decides.
If that produced a correction to a rule your field has used for twenty years, confirmed across a factor of four in phase count, it is worth an hour to talk about what the same discipline finds in your flow.
Book a scoping conversationThe design reproduced in this case is from Kaiwei Yao, High-Frequency and High-Performance VRM Design for the Next Generations of Processors, PhD dissertation, Virginia Polytechnic Institute and State University, April 14, 2004 (chairman Fred C. Lee). The correction described above restores the mechanism the author himself states and is consistent with it. The work is public and the figures on this page can be reproduced from it.